This invention relates to signal propagation on integrated circuits. More particularly, this invention relates to optical signal propagation on integrated circuits having conventional electrical semiconductor circuit elements.
Advances in integrated circuit fabrication technology make possible both larger and denser integrated circuits. These integrated circuits can be fabricated as a single chip or as an integrated wafer. A chip is a piece of semiconductor material having fabricated thereon a number of interconnected circuit elements (such as, for example, transistors, diodes, resistors, and capacitors). Typically, multiple identical chips are fabricated on a single wafer, which is a larger piece of semiconductor material. An integrated wafer has multiple circuits fabricated thereon that are interconnected to form a single circuit the full size of the wafer. This is commonly known as wafer-scale integration.
Many integrated circuit architectures require certain signals to be supplied to many circuits. For example, many circuits may need to receive the same clock or control signals. Similarly, many circuits may need to receive the same data signals. In some cases, each of several data or control signals may need to go to respective different groups of circuits. Accordingly, as integrated circuits become larger and denser, signal routing becomes more difficult, causing more valuable integrated circuit area to be used for routing data busses and global clock and control lines.
Moreover, an increasing number of integrated circuit applications requires significantly increased performance, even ultra-high performance. However, large integrated circuits typically have long and complex signal paths in which signals are often routed through multiple wiring planes. Such long complex paths usually increase signal propagation delay, which can adversely affect performance, because the operating speed of an integrated circuit (i.e., its performance) is directly affected by signal propagation delayxe2x80x94the longer the delay, the worse the performance. Accordingly, large amounts of data and clock and control signals need to be propagated at rapid rates of speed in order to meet such ultra-high performance requirements.
Furthermore, long complex clock lines can result in skewing problems, making clock synchronization more difficult. Skew refers to different amounts of delay associated with clock signals reaching different circuits. To reduce or eliminate clock skew, long complex clock lines usually need additional circuitry to re-synchronize the phasing of the clock signal. Alternatively, a more complex system design can be used to compensate for the clock skew. Such a system design may involve, for example, circuitry to delay the signals of some portions of the circuit, thereby slowing overall operations. In either case, additional integrated circuit area is needed to support the additional clock circuitry, which further increases power dissipation on the integrated circuit.
Accordingly, a need exists for large dense integrated circuits that have additional global wiring paths not requiring additional integrated circuit area. A need also exists for rapid data, clock, and control signal propagation; reduced power dissipation; and clock signals with little or no skew.